摘要:大规模可编程逻辑器件是近年来为适应专用集成电路设计需求而迅速发展起来的一类新型可编程ASIC器件。随着它的不断应用和发展，也使电子设计的规模和集成度不断提高。同时，带来了电子系统设计方法和设计思想的不断推陈出新。

本设计使用能够满足较高速度要求的FPGA（现场可编程门阵列）来实现一个在数字信号分析和处理领域重要的变换工具—FFT。FFT的算法是基2时域8点的FFT。通过C语言的的浮点以及定点的程序模拟，最终通过verilog HDL在Xilinx ISE 5.1i环境下进行编程和仿真。

 

关键词： FFT  verilog HDL   FPGA  定点 浮点

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Abstract：With the development of Application Specific Integrated Circuit, great process has been made in programmable large scale logic devices. The scale and integration of electronic system are being enlarged continuously. Hence the method and idea of electronic system designing are improved from time to time.

This design use FPGA(Field Programmable Gate Array)which can satisfy the higher speed request to realize a transformation for at arithmetic figure signal analysis with handling realm importance tool — FFT. It is based on the Radix-2 DIT eight points algorithm. The arithmetic of FFT is described in language C using floating-point and fixing-point, and is described in Verilog, simulated under the Xilinx ISE at last.

 

keyword： FFT, verilog HDL, FPGA, floating-point, fixing-point